Courses in principles of digital computers usually begin with elementary logic circuits, proceed through increasingly complex ones, and often end with the design of a central processing unit. Such processors are typically simpler to explain than commercial microprocessors, but also often have very limited capabilities. The educational processor presented in this paper has a good balance between simplicity and capabilities. All its instructions, including multiplication and bit rotation, are executed in one clock cycle. The method of encoding and decoding instructions is quite simplified so that the encoding of instructions can be done even manually without tables, and the decoder unit is a simple forwarding of parts of the instruction word to the control bits of multiplexers. The processor is symmetric around the number 16: it has 16 three-operand instructions, 16 registers, each register is 16 bits wide, as well as the address and data bus. It is simulated at the logic gates level, a Verilog implementation on FPGA, and an emulated computer run by an implementation of a Forth interpreter written partly in its machine language.

Algorithms for solving Rubik’s cube have been an active research area since the first appearance of the cube in 1974. The challenge posed when solving the cube is to choose an algorithm that solves the cube for the minimum number of steps. Many algorithms are already implemented in software, but not many are tested with modern hardware-software methodologies, such as hardware-software co-design. Here, the challenge is to take into consideration limiting factors of hardware and implement the most efficient solution. In this paper, the hardware/software co-design is used to solve the random configuration of Rubik’s cube. Two algorithms are used: the Basic algorithm and the Kociemba algorithm. The Basic algorithm is easy to understand and implement but requires many more steps to solve the cube than the Kociemba algorithm. The Kociemba algorithm requires some pre-processing tasks, such as depth-first search and pruning trees, but can solve the cube in about 25 moves. Both algorithms are implemented and tested on a custom-made robot with mechanical parts, actuators, grippers and Intel’s DE1-SoC for drive control and implementation of solving algorithms. The robot successfully solved a number of random configurations. Performances (running time, number of moves needed for solving the cube) of both algorithms are measured and compared.

Creating school timetables is a problem whose complexity varies depending on school size and the requirements that occur in a model. The topic of this paper is related to schools that lack resources because they work in shifts and they are rarely discussed in literature. The first problem is the way the requirements are written. The paper deals with the XHSTT format and REDOSPLAT, a domain-specific language designed to set up timetable requirements. Another problem is the way a model is solved. We investigated the VNS and SVNS algorithms because they showed good results for this type of school. Their application on the actual test cases also revealed some interesting phenomena in formulating the requirements that can significantly affect the quality of the solution.